In device assembly, a drop test is often used to measure the durability of a component (e.g., a circuit board with attached integrated circuits) by subjecting it to a free fall from a predetermined height into a surface under prescribed conditions. For example, the drop test is applied to circuit boards on which ball grid array (BGA) packages are mounted to measure the impact from a mechanical shock.
BGA packages are typically produced in matrix form, which are then block molded and sawn into units. FIG. 1 illustrates a typical single BGA package 100 including a substrate layer 104 on one side of which is attached a semiconductor chip 108. The semiconductor chip 108 is preferably attached to the substrate layer 104 by a dielectric adhesive layer 124. A plurality of solder balls 116, which are attached to the other side of the substrate layer 104, are electrically connected to the semiconductor chip 108 via wires 120 and vias (not shown) which extend through the substrate layer 104. A layer of compound material 112 is deposited over the semiconductor chip 108 to encapsulate the semiconductor chip 108. The compound material 112 may be an epoxy resin-type material. The BGA package 100 is typically mounted on a printed circuit board (PCB) for installation in electronic devices and systems.
FIG. 2 illustrates a typical PCB 204 on which is mounted a BGA package 208. The PCB 204 when subjected to a drop test is deformed due to the impact from a mechanical shock. FIGS. 3 and 4 illustrate the PCB 204 during a drop impact. As shown in FIGS. 3 and 4, the PCB 204 is bent upward or downward depending on the orientation during the impact. The BGA package 208 mounted on the PCB 204 tends to follow the deformation of the PCB 204, which leads to uneven loading of the solder balls 212. In particular, as the size of the semiconductor chip 208 increases, the solder balls on the periphery are subjected to increased loading and deformation because they are farther away from a neutral axis 216. Increase in the thickness of the package also causes the semiconductor chip 208 to become less compliant to bending, thus adding to the stress applied at the edges/corners of the package. FIG. 5 is a plot illustrating the simulation result of a BGA package's drop test characteristic versus size. As the size of the BGA package increases, its drop test characteristic decreases exponentially. The larger the package, the fewer drops it takes before failure, which is a significant concern as package sizes are increasing.